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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71T75802S133BG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S133BG8	3D model available Symbol and footprint available 3	1 Download Model
	71T75902S85BGG Renesas Electronics	1	The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround.	BGA	71T75902S85BGG	3D model available Symbol and footprint available 3	1 Download Model
	R1LV0108ESN-5SI#B0 Renesas Electronics	1	The R1LV0108E Series is a family of low voltage 1-Mbit static RAMs organized as 131, 072-word by 8-bit, fabricated by Renesas’s high-performance 0. 15um CMOS and TFT technologies. The R1LV0108E Series has realized higher density, higher performance and low power consumption. The R1LV0108E Series is suitable for memory applications where a simple interfacing, battery operating and battery backup are the important design objectives. It has been packaged in 32-pin SOP, 32-pin TSOP and 32-pin sTSOP.	Small Outline Packages	R1LV0108ESN-5SI#B0	3D model available Symbol and footprint available 3	1 Download Model
	HM1-65642/883 Renesas Electronics	1	The HM-65642/883 is a CMOS 8192 x 8-bit Static Random Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide standard, which allows easy memory board layouts which accommodate a variety of industry standard ROM, PROM, EPROM, EEPROM and RAMs. The HM-65642/883 is ideally suited for use in microprocessor based systems. In particular, interfacing with the Renesas 80C86 and 80C88 microprocessors is simplified by the convenient output enable (G) input. The HM-65642/883 is a full CMOS RAM which utilizes an arra	Ceramic Dual-In-Line Packages	HM1-65642/883	3D model not available Symbol and footprint available 2	1 Download Model

	71V65703S85PFGI Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V65703S85PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V2556SA100BG8 Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2556SA100BG8	3D model available Symbol and footprint available 3	1 Download Model
	70V3399S133BCI Renesas Electronics	1	The 70V3399 is a high-speed 128K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3399 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3399S133BCI	3D model available Symbol and footprint available 3	1 Download Model
	70T3799MS166BBG Renesas Electronics	1	The 70T3799M is a high-speed 128K x 72 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3799M can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3799MS166BBG	3D model available Symbol and footprint available 3	1 Download Model
	70T3589S133BF8 Renesas Electronics	1	The 70T3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3589S133BF8	3D model available Symbol and footprint available 3	1 Download Model
	70T3719MS133BBG Renesas Electronics	1	The 70T3719M is a high-speed 256K x 72 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3719M can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3719MS133BBG	3D model available Symbol and footprint available 3	1 Download Model
	7142LA20JG8 Renesas Electronics	1	The 7142 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port RAM together with the 7132 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Plastic Leaded Chip Carrier	7142LA20JG8	3D model not available Symbol and footprint available 2	1 Download Model
	70V3379S5BFI8 Renesas Electronics	1	The 70V3379 is a high-speed 32K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3379 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3379S5BFI8	3D model available Symbol and footprint available 3	1 Download Model
	71V65603S133BGGI8 Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S133BGGI8	3D model available Symbol and footprint available 3	1 Download Model
	RMLV0816BGSA-4S2#AA0 Renesas Electronics	1	The RMLV0816BGSA is a family of 8-Mbit static RAMs organized 524, 288-word × 16-bit, fabricated by Renesas’s high-performance Advanced LPSRAM technologies. The RMLV0816BGSA has realized higher density, higher performance and low power consumption. The RMLV0816BGSA offers low power standby power dissipation;therefore, it is suitable for battery backup systems. It is offered in 48pin TSOP (I).	Small Outline Packages	RMLV0816BGSA-4S2#AA0	3D model available Symbol and footprint available 3	1 Download Model
	7164L55DB Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	7164L55DB	3D model not available Symbol and footprint available 2	1 Download Model

	71256SA15YGI Renesas Electronics	1	The 71256SA 5V CMOS SRAM is organized as 32K x 8. All bidirectional inputs and outputs of the 71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71256SA15YGI	3D model available Symbol and footprint available 3	1 Download Model
	5962-8700214ZA Renesas Electronics	0	The 5962-87002 (IDT 7132/42) is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with M	Ceramic Dual-In-Line Packages	5962-8700214ZA	3D model not available Symbol and footprint available 2	1 Download Model
	71T75902S75PFGI Renesas Electronics	1	The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround.	Quad Flat Packages	71T75902S75PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA133BG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA133BG	3D model available Symbol and footprint available 3	1 Download Model
	71V424L15YG Renesas Electronics	1	The 71V424 3.3V CMOS SRAM is organized as 512K x 8. All bidirectional inputs and outputs of the 71V424 are TTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V424L15YG	3D model available Symbol and footprint available 3	1 Download Model
	71V3556S100PFG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3556S100PFG	3D model available Symbol and footprint available 3	1 Download Model
	71V67602S133PFGI Renesas Electronics	1	The 71V67602 3.3V CMOS SRAM is organized as 256K x 36. The 71V676 SRAM contains write, data, address and control registers. Internal logic allows the SRAM to generate a self-timed write based upon a decision which can be left until the end of the write cycle. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V67602S133PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V3558SA100BQG8 Renesas Electronics	1	The 71V3558 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3558 contains data I/O, address and control signal registers.	BGA	71V3558SA100BQG8	3D model available Symbol and footprint available 3	1 Download Model
	8403602JA Renesas Electronics	1	The HM-65162/883 is a CMOS 2048 x 8 Static Random Access Memory manufactured using the Renesas Advanced SAJI V process. The device utilizes asynchronous circuit design for fast cycle time and ease of use. The pinout is the JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which allows easy memory board layouts flexible to accommodate a variety of industry standard PROMs, RAMs, ROMs and EPROMs. The HM-65162/883 is ideally suited for use in microprocessor based systems with its 8-bit word length organization.	Dual-In-Line Packages	8403602JA	3D model available Symbol and footprint available 3	1 Download Model
	7130LA35CB Renesas Electronics	1	The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535	Ceramic Dual-In-Line Packages	7130LA35CB	3D model not available Symbol and footprint available 2	1 Download Model
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