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71V3577S80BQ
Renesas Electronics
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1 | The 71V3577 3.3V CMOS SRAM is organized as 128K x 36. The 71V3577 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V3577S80BQ |
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71V67703S85PFG
Renesas Electronics
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1 | The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | Quad Flat Packages | 71V67703S85PFG |
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6116SA25TDB
Renesas Electronics
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1 | The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available. | Ceramic Dual-In-Line Packages | 6116SA25TDB |
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71V416L12PHGI
Renesas Electronics
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1 | The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Small Outline Packages | 71V416L12PHGI |
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71V424L10PHGI
Renesas Electronics
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1 | The 71V424 3.3V CMOS SRAM is organized as 512K x 8. All bidirectional inputs and outputs of the 71V424 are TTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Small Outline Packages | 71V424L10PHGI |
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71V3579S85PFGI8
Renesas Electronics
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1 | The 71V3579 3.3V CMOS SRAM is organized as 256K x 18. The 71V3579 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | Quad Flat Packages | 71V3579S85PFGI8 |
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7006L35G
Renesas Electronics
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1 | The 7006 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available. | Other | 7006L35G |
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RMLV0416EGSB-4S2#AA0
Renesas Electronics
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1 | The RMLV0416E Series is a family of 4-Mbit static RAMs organized 262, 144-word × 16-bit, fabricated by Renesas’s high-performance Advanced LPSRAM technologies. The RMLV0416E Series has realized higher density, higher performance and low power consumption. The RMLV0416E Series offers low power standby power dissipation;therefore, it is suitable for battery backup systems. It is offered in 44-pin TSOP (II) or 48-ball fine pitch ball grid array. | Small Outline Packages | RMLV0416EGSB-4S2#AA0 |
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71256L100TDB
Renesas Electronics
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1 | The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available. | Ceramic Dual-In-Line Packages | 71256L100TDB |
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71V65603S100BG
Renesas Electronics
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1 | The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V65603S100BG |
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5962-8687508XA
Renesas Electronics
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1 | The 5962-86875 (IDT 7130/40) is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with | Ceramic Dual-In-Line Packages | 5962-8687508XA |
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70V631S10BC8
Renesas Electronics
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1 | The 70V631 is a high-speed 256K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po | BGA | 70V631S10BC8 |
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5962-8687515XA
Renesas Electronics
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1 | The 5962-86875 (IDT 7130/40) is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with | Ceramic Dual-In-Line Packages | 5962-8687515XA |
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71V65703S85BQGI
Renesas Electronics
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1 | The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V65703S85BQGI |
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70V3589S166BF8
Renesas Electronics
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1 | The 70V3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V. | BGA | 70V3589S166BF8 |
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5962-8687504XA
Renesas Electronics
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1 | The 5962-86875 (IDT 7130/40) is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with | Ceramic Dual-In-Line Packages | 5962-8687504XA |
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71V016SA15PHG8
Renesas Electronics
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1 | The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Small Outline Packages | 71V016SA15PHG8 |
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71V416L15BEI
Renesas Electronics
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1 | The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | BGA | 71V416L15BEI |
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70T3599S166BF
Renesas Electronics
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1 | The 70T3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V. | BGA | 70T3599S166BF |
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7008S55G
Renesas Electronics
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1 | The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. | Other | 7008S55G |
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71V67603S133PFG8
Renesas Electronics
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1 | The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.The order of these three addresses are defined by the internal burst counter and the LBO input pin. | Quad Flat Packages | 71V67603S133PFG8 |
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70T3599S133BC
Renesas Electronics
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1 | The 70T3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V. | BGA | 70T3599S133BC |
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R1QBA7218ABB-20IB1
Renesas Electronics
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1 | The R1Q#A7236 is a 2, 097, 152-word by 36-bit and the R1Q#A7218 is a 4, 194, 304-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, High-Speed, low | BGA | R1QBA7218ABB-20IB1 |
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70T3339S166BC8
Renesas Electronics
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1 | The 70T3339 is a high-speed 512K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3339 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V. | BGA | 70T3339S166BC8 |
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71124S15YGI8
Renesas Electronics
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1 | The 71124 5V CMOS SRAM is organized as 128K x 8. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71124S15YGI8 |
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