Showing 0 of 0 results
Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action |
---|
Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action |
---|---|---|---|---|---|---|---|
No results were found for Other Trigger Devices |
Showing 25 of 2306511 results
Filter by Manufacturer
Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action |
---|
Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
7152AM-02LFT
Renesas Electronics
|
1 | The 7152A-02 is a clock generator for EMI (Electromagnetic Interference) reduction (see datasheet for frequency ranges and multiplier ratios). Spectral peaks are attenuated by modulating the system clock frequency. Down or center spread profiles are selectable. Down spread will not exceed the maximum frequency of an unspread clock, and center spread does not change the average operating frequency of the system IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to | Small Outline Packages | 7152AM-02LFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
7152AMI-11LF
Renesas Electronics
|
1 | The 7152A-11 is a clock generator for EMI (Electromagnetic Interference) reduction (see datasheet for frequency ranges and multiplier ratios). Spectral peaks are attenuated by modulating the system clock frequency. Down or center spread profiles are selectable. Down spread will not exceed the maximum frequency of an unspread clock, and center spread does not change the average operating frequency of the system IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to | Small Outline Packages | 7152AMI-11LF |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
SP370251160XTMA3
Infineon
|
1 | Board Mount Pressure Sensors TPMS & INERTIA | Small Outline Packages | SP370251160XTMA3 |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
ADP-5171
Panasonic
|
1 | Pressure Sensor,DIP terminal 1,000kPa | Dual-In-Line Packages | ADP-5171 |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
SM9543-005M-D-C-3-S
Silicon Microstructures, Inc.
|
0 | Board Mount Pressure Sensors | Small Outline Packages | SM9543-005M-D-C-3-S |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
AG4*6
Fujikura
|
1 | Semiconductor Pressure Sensor | Other | AG4*6 |
2
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
7152AMI-02LF
Renesas Electronics
|
1 | The 7152A-02 is a clock generator for EMI (Electromagnetic Interference) reduction (see datasheet for frequency ranges and multiplier ratios). Spectral peaks are attenuated by modulating the system clock frequency. Down or center spread profiles are selectable. Down spread will not exceed the maximum frequency of an unspread clock, and center spread does not change the average operating frequency of the system IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to | Small Outline Packages | 7152AMI-02LF |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
7152AMI-11LFT
Renesas Electronics
|
1 | The 7152A-11 is a clock generator for EMI (Electromagnetic Interference) reduction (see datasheet for frequency ranges and multiplier ratios). Spectral peaks are attenuated by modulating the system clock frequency. Down or center spread profiles are selectable. Down spread will not exceed the maximum frequency of an unspread clock, and center spread does not change the average operating frequency of the system IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to | Small Outline Packages | 7152AMI-11LFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
MP3V5010GC6T1
NXP
|
1 | Board Mount Pressure Sensors SMALL OUTLINE SMT | Small Outline Packages | MP3V5010GC6T1 |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
iW1782X-81
Renesas Electronics
|
1 | The iW1782 is a high-performance AC/DC power supply controller for rapid charge that uses digital control technology to build peak current mode PWM flyback power supplies. The iW1782 is optimized to work with Renesas' iW636 secondary-side controller for Qualcomm® Quick Charge™ 3.0 technology to achieve fast and smooth voltage transition upon request by mobile devices (MD). When paired with the iW636, the iW1782 eliminates the discrete decoders on the primary side, minimizes the external component count a | Small Outline Packages | iW1782X-81 |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
MPXA6115AC7U
NXP
|
1 | Board Mount Pressure Sensors NON-VENTED DIP W/PRT | Other | MPXA6115AC7U |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB106BGILFT
Renesas Electronics
|
1 | The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications. | Small Outline Packages | 9DB106BGILFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
IW1782-03
Renesas Electronics
|
1 | The iW1782 is a high-performance AC/DC power supply controller for rapid charge that uses digital control technology to build peak current mode PWM flyback power supplies. The iW1782 is optimized to work with Renesas' iW636 secondary-side controller for Qualcomm® Quick Charge™ 3.0 technology to achieve fast and smooth voltage transition upon request by mobile devices (MD). When paired with the iW636, the iW1782 eliminates the discrete decoders on the primary side, minimizes the external component count and | Small Outline Packages | IW1782-03 |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB633AFILF
Renesas Electronics
|
1 | The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB633AFILF |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB233AFILFT
Renesas Electronics
|
1 | The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB233AFILFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB633AGILF
Renesas Electronics
|
1 | The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB633AGILF |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB633AFLFT
Renesas Electronics
|
1 | The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB633AFLFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB233AGLFT
Renesas Electronics
|
1 | The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB233AGLFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
NPA-300B-10WD
Amphenol
|
1 | Surface Mount Pressure Sensor | Small Outline Packages | NPA-300B-10WD |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
KP253XTMA1
Infineon
|
1 | Digital Absolute Pressure Sensor | Other | KP253XTMA1 |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB233AFLFT
Renesas Electronics
|
1 | The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB233AFLFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB106BGLF
Renesas Electronics
|
1 | The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications. | Small Outline Packages | 9DB106BGLF |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB106BGLFT
Renesas Electronics
|
1 | The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications. | Small Outline Packages | 9DB106BGLFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB106BFILFT
Renesas Electronics
|
1 | The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications. | Small Outline Packages | 9DB106BFILFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
9DB233AGILFT
Renesas Electronics
|
1 | The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB233AGILFT |
3
|
Download Model | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||