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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	853S011BMILF Renesas Electronics	1	The 853S011BI is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The 853S011BI is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S011BI ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	853S011BMILF	3D model available Symbol and footprint available 3	1 Download Model
	553MILFT Renesas Electronics	1	The 553 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	553MILFT	3D model available Symbol and footprint available 3	1 Download Model
	85322AMILFT Renesas Electronics	1	The 85322I is a Dual LVCMOS / LVTTL-to- Differential 2.5V / 3.3V LVPECL translator. The 85322I has selectable single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 2.5V / 3.3V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85322AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	508MILF Renesas Electronics	1	The 508 is the most cost effective way to generate a high quality, high frequency CMOS clock output from a PECL clock input. The 508 has separate VDD supplies for the PECL input buffer and the output buffer, allowing different voltages to be used. For example, the input clock could use a 3.3 V supply while the output operates from 2.5V. The device has an Output Enable pin that tri-states the clock output when the OE pin is taken low. The 508 is a member of IDT's ClockBlocksTM family.	Small Outline Packages	508MILF	3D model available Symbol and footprint available 3	1 Download Model

	83021AMILFT Renesas Electronics	1	The 83021I is a 1-to-1 Differential-to-LVCMOS/ LVTTL Translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL, and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.	Small Outline Packages	83021AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	663MILF Renesas Electronics	1	The IDT663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO) and an output buffer. Through the use of external reference and VCO dividers (implemented with the IDT674-01, for example), the user can easily configure the device to lock to a wide variety of input frequencies. The phase detector and VCO functions of the device can also be used independently. This enables the config	Small Outline Packages	663MILF	3D model available Symbol and footprint available 3	1 Download Model
	85322AMILF Renesas Electronics	1	The 85322I is a Dual LVCMOS / LVTTL-to- Differential 2.5V / 3.3V LVPECL translator. The 85322I has selectable single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 2.5V / 3.3V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85322AMILF	3D model available Symbol and footprint available 3	1 Download Model
	524MILFT Renesas Electronics	1	The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	524MILFT	3D model available Symbol and footprint available 3	1 Download Model
	91305AMILF Renesas Electronics	1	The IDT91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds from 10 to 133 MHz.IDT91305 is a zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and	Small Outline Packages	91305AMILF	3D model available Symbol and footprint available 3	1 Download Model
	501BMILF Renesas Electronics	1	The 501B Loco™ is the most cost effective way to generate a high-quality clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 15 MHz. Stored in the chip's ROM is the ability to generate nine different multiplication factors, allowing one chip t	Small Outline Packages	501BMILF	3D model available Symbol and footprint available 3	1 Download Model
	85320AMILFT Renesas Electronics	1	The 85320I is a LVCMOS / LVTTL-to-Differential 3.3V, 2.5V LVPECL translator. The 85320I has a single ended clock input. The single ended clock input accepts LVCMOS or LVTTL input levels and translates them to 3.3V or 2.5V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85320AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	830S21AMILFT Renesas Electronics	1	830S21I is a 1-to-1 Differential-to- LVCMOS/ LVTTL translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.	Small Outline Packages	830S21AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	830S21AMILF Renesas Electronics	1	830S21I is a 1-to-1 Differential-to- LVCMOS/ LVTTL translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.	Small Outline Packages	830S21AMILF	3D model available Symbol and footprint available 3	1 Download Model
	ICS83021AMILF Renesas Electronics	1	IDT ICS83021AMILF, Logic Level Translator, Translator, Differential to LVCMOS, LVTTL, Single Ended, 8-Pin SOIC	Small Outline Packages	ICS83021AMILF	3D model available Symbol and footprint available 3	1 Download Model
	501AMILFT Renesas Electronics	1	The 501A is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. It is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. Stored in the chip's ROM is the ability to generate nine different multiplication factors, allowing one chip to output many common frequencies (see	Small Outline Packages	501AMILFT	3D model available Symbol and footprint available 3	1 Download Model

	874S02BMILF Renesas Electronics	1	The 874S02I is a highly versatile 1:1 Differential-to-LVDS Clock Generator and a member of the family of High Performance Clock Solutions from IDT. The 874S02I has a fully integrated PLL and can be configured as a zero delay buffer, multiplier or divider, and has an output frequency range of 62.5MHz to 1GHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external fee	Small Outline Packages	874S02BMILF	3D model available Symbol and footprint available 3	1 Download Model
	853S013AMILFT Renesas Electronics	1	The 853S013I is a low skew, high performance dual 1-to-3 Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer. The 853S013I operates with a positive or negative power supply at 2.5V or 3.3V. Guaranteed output and part-to-part skew characteristics make the 853S013I ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	853S013AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	85411AMILFT Renesas Electronics	1	The 85411I is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels. The 85411I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 85411I ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	85411AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	853S013AMILF Renesas Electronics	1	The 853S013I is a low skew, high performance dual 1-to-3 Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer. The 853S013I operates with a positive or negative power supply at 2.5V or 3.3V. Guaranteed output and part-to-part skew characteristics make the 853S013I ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	853S013AMILF	3D model available Symbol and footprint available 3	1 Download Model
	524MILF Renesas Electronics	1	The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	524MILF	3D model available Symbol and footprint available 3	1 Download Model
	542MILF Renesas Electronics	1	The 542 is cost effective way to produce a high-quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the other. For instance, if an 100 MHz input clock is used, the 542 can produce low-skew 50 MHz and 25 MHz clocks, or low skew 25 MHz and 12.5 MHz clocks. The chip has an all-chip power-down mode that stops the outputs lo	Small Outline Packages	542MILF	3D model available Symbol and footprint available 3	1 Download Model
	508MILFT Renesas Electronics	1	The 508 is the most cost effective way to generate a high quality, high frequency CMOS clock output from a PECL clock input. The 508 has separate VDD supplies for the PECL input buffer and the output buffer, allowing different voltages to be used. For example, the input clock could use a 3.3 V supply while the output operates from 2.5V. The device has an Output Enable pin that tri-states the clock output when the OE pin is taken low. The 508 is a member of IDT's ClockBlocksTM family.	Small Outline Packages	508MILFT	3D model available Symbol and footprint available 3	1 Download Model
	83026AMILFT Renesas Electronics	1	The 83026I is a low skew, 1-to-2 Differential-to- LVCMOS/LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT.The differential input can accept most differential signal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and translate to two single-ended LVCMOS/LVTTL outputs with a maximum output skew of 20ps. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.	Small Outline Packages	83026AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	853S011CMILF Renesas Electronics	1	The 853S011CI is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The 853S011CI is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S011CI ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	853S011CMILF	3D model available Symbol and footprint available 3	1 Download Model
	87321AMILFT Renesas Electronics	1	The 87321I is a high performance ÷1, ÷2 Differential-to-LVPECL Clock Generator and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels. The 87321I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed part-to-part skew characteristics make the 87321I ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	87321AMILFT	3D model available Symbol and footprint available 3	1 Download Model
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