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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	MC33771CTA1AER2 NXP	1	Battery Management Battery Cell Controller, Advanced, 14 Channels, TPL, LQFP64	Quad Flat Packages	MC33771CTA1AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33771BTA1AER2 NXP	1	Battery Controller Li-Ion Automotive 64-Pin QFP T/R	Quad Flat Packages	MC33771BTA1AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33771BTP1AER2 NXP	1	Battery Management MC33771BTP1AE/HLQFP64///REEL 13 Q2 DP	Quad Flat Packages	MC33771BTP1AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33PT2001AER2 NXP	1	Driver 12-OUT High and Low Side 64-Pin HLQFP EP T/R	Quad Flat Packages	MC33PT2001AER2	3D model available Symbol and footprint available 3	1 Download Model

	MPC9443AER2 Renesas Electronics	1	The MPC9443 is a full static design supporting clock frequencies up to 350 MHz. The signals are generated and retimed on-chip to ensure minimal skew between the four output banks. Two independent LVPECL compatible clock inputs are available. This feature supports redundant differential clock sources. In addition, the MPC9443 supports single-ended LVCMOS clock distribution systems. Each of the four output banks can be individually supplied by 2.5 V or 3.3 V, supporting mixed voltage applications. The FSELx p	Quad Flat Packages	MPC9443AER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC9600AER2 Renesas Electronics	1	The MPC9600 is a fully LVCMOS 2.5 V or 3.3 V compatible PLL clock driver. The MPC9600 has the capability to generate clock signals of 50 to 200 MHz from clock sources of 16.67 to 50 MHz. The internal PLL is optimized for this frequency range and does not require external loop filter components. QFB provides an output for the external feedback path to the feedback input FB_IN. The QFB divider ratio is configurable and determines the PLL frequency multiplication factor when QFB is directly connected to FB_IN.	Quad Flat Packages	MPC9600AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33CD1030AER2 NXP	1	Interface - Specialized 33 channel, Mono, 48	Quad Flat Packages	MC33CD1030AER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC941AER2 Renesas Electronics	1	The MPC941 is a 1:27 low voltage clock distribution chip. The device features the capability to select either a differential LVPECL or an LVCMOS compatible input. The 27 outputs are LVCMOS compatible and feature the drive strength to drive 50Ω series or parallel terminated transmission lines. With output-to-output skews of 250 ps, the MPC941 is ideal as a clock distribution chip for the most demanding of synchronous systems. For a similar product with a smaller number of outputs, please consult the MPC940 d	Quad Flat Packages	MPC941AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33FS6501CAER2 NXP	1	Power Management Specialised - PMIC System Basis Chip, DCDC 0.8A Vcore FS1B CAN, LQFP48EP	Quad Flat Packages	MC33FS6501CAER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33PT2001MAER2 NXP	1	Driver 12-OUT High and Low Side 64-Pin HLQFP EP T/R	Quad Flat Packages	MC33PT2001MAER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33FS6523CAER2 NXP	1	Power System Basis Chip Automotive 48-Pin HLQFP EP T/R	Quad Flat Packages	MC33FS6523CAER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33771CTA2AER2 NXP	1	Battery Management Battery Cell Controller, Advanced, 8 Channels, TPL, LQFP64	Quad Flat Packages	MC33771CTA2AER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC9893AER2 Renesas Electronics	1	The MPC9893 is a 2.5 V and 3.3 V compatible, PLL based intelligent dynamic clock switch and generator specifically designed for redundant clock distribution systems. The device receives two LVCMOS clock signals and generates 12 phase aligned output clocks. The MPC9893 is able to detect a failing reference clock signal and to dynamically switch to a redundant clock signal. The switch from the failing clock to the redundant clock occurs without interruption of the output clock signal (output clock slews to al	Quad Flat Packages	MPC9893AER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC9774AER2 Renesas Electronics	1	The MPC9774 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9774 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The reference clock frequency and the divider for the feedback path determine the VCO frequency. Both must be selected to match the VCO frequency range. The MPC9774 features frequency programmability between the three output banks outputs as well as the output to input re	Quad Flat Packages	MPC9774AER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC9772AER2 Renesas Electronics	1	The MPC9772 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9772 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The reference clock frequency and the divider for the feedback path determine the VCO frequency. Both must be selected to match the VCO frequency range. The MPC9772 features an extensive level of frequency programmability between the 12 outputs as well as the output to in	Quad Flat Packages	MPC9772AER2	3D model available Symbol and footprint available 3	1 Download Model

	MPC92433AER2 Renesas Electronics	1	The MPC92433 is a 3.3 V compatible, PLL based clock synthesizer targeted for high performance clock generation in mid-range to high-performance telecom, networking, and computing applications. With output frequencies from 42.50 MHz to 1428 MHz and the support of two differential PECL output signals, the device meets the needs of the most demanding clock applications. Features	Quad Flat Packages	MPC92433AER2	3D model available Symbol and footprint available 3	1 Download Model
	SiT1618AER23-18E-25.000000 SiTime	1	Standard Frequency, High Temperature Oscillator, 3.2 x 2.5 x 0.75 mm Package	Other	SiT1618AER23-18E-25.000000	3D model available Symbol and footprint available 3	1 Download Model
	MC33813AER2 NXP	1	High Performance Gate Driver IC	Quad Flat Packages	MC33813AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC33908LAER2 NXP	1	Power Management Specialized - PMIC System Basis Chip, CAN/LIN, 5V , 1.5A VCORE, QFP 48	Quad Flat Packages	MC33908LAER2	3D model available Symbol and footprint available 3	1 Download Model
	MM912F634BC3AER2 Nexperia	0	Integrated S12 Based Relay Driver with LIN	Other	MM912F634BC3AER2	3D model not available Symbol and footprint available 2	1 Download Model
	MC33814AER2 NXP	1	Gate Drivers 2 CYL SM ENG CONTROL IC	Quad Flat Packages	MC33814AER2	3D model available Symbol and footprint available 3	1 Download Model
	MC35FS4508NAER2 NXP	1	Power Management Specialized - PMIC PWRSBC Gen5/linear 0.5A Vcore	Quad Flat Packages	MC35FS4508NAER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC9773AER2 Renesas Electronics	1	The MPC9773 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9773 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The reference clock frequency and the divider for the feedback path determine the VCO frequency. Both must be selected to match the VCO frequency range. The MPC9773 features an extensive level of frequency programmability between the 12 outputs as well as the output to in	Quad Flat Packages	MPC9773AER2	3D model available Symbol and footprint available 3	1 Download Model
	MPC9449AER2 Renesas Electronics	1	The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications.	Quad Flat Packages	MPC9449AER2	3D model available Symbol and footprint available 3	1 Download Model
	AER2-40 Vertiv Inc	1	Fixed Resistor, Wire Wound,		AER2-40	3D model not available Symbol and footprint not available 0	0 Build or Request
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