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MC100EL01DG
onsemi
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1 | 230ps Propagation Delay; ESD Protection: > 1 KV HBM, > 100 V MM; NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V; PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 46 devices; Pb-Free Packages are Available | Small Outline Packages | MC100EL01DG |
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MC100ES6011EJ
Renesas Electronics
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1 | The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage. The 100ES Series contains temperature compensation. | Small Outline Packages | MC100ES6011EJ |
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MC100EP31DTG
onsemi
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1 | Open Input Default State; Q Output will default LOW with inputs open or at VEE; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; 340ps Typical Propagation Delay; NECL Mode Operating Range: VCC= 0 V with VEE= –3.0 V to –5.5 V; Pb-Free Packages are Available | Small Outline Packages | MC100EP31DTG |
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MC100ELT24DG
onsemi
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1 | TTL to ECL Translator, 1 Func, Complementary Output, ECL, PDSO8 | Small Outline Packages | MC100ELT24DG |
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MC100EL14DWG
onsemi
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1 | ECL 1:5 Clock Distribution Chip | Other | MC100EL14DWG |
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MC100ELT21DG
onsemi
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1 | ON Semiconductor MC100ELT21DG, Logic Level Translator, PECL to TTL, 4.75 → 5.25 V, 8-Pin SOIC | Small Outline Packages | MC100ELT21DG |
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MC100EP40DTG
onsemi
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1 | Maximum Frequency > 2 Ghz Typical; Fully Differential; Advanced High Band Output Swing of 400 mV; Theoretical Gain = 1.11; Trise 97 pS Typical, Ffall 70 pS Typical; The 100 Series Contains Temperature Compensation; PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; 50Ω Internal Termination Resistor; These are Pb-Free Devices | Small Outline Packages | MC100EP40DTG |
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MC100LVEL16DTG
onsemi
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1 | 300 ps Propagation Delay; ESD Protection: >2 KV HBM, > 200 V MM; The 100 Series Contains Temperature Compensation; High Bandwidth Output Transitions; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -3.8 V; Internal Input Pulldown Resistors on D, Pullup and Pulldown Resistors on Dbar; Q Output will Default LOW with Inputs Open or at VEE; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Inf | Small Outline Packages | MC100LVEL16DTG |
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MC100EP51DG
onsemi
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1 | Maximum Frequency > 3 Ghz Typical; 350ps Typical Propagation Delay; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available | Small Outline Packages | MC100EP51DG |
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MC100EP32DTG
onsemi
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1 | PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; 350ps Typical Propagation Delay; NECL Mode Operating Range: VCC= 0 V with VEE= –3.0 V to –5.5 V; Q Output will default LOW with inputs open or at VEE; Maximum Frequency > 4 GHz Typical; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available | Small Outline Packages | MC100EP32DTG |
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MC100EP14DTG
onsemi
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1 | 100 ps Device-to-Device Skew; 25 ps Within Device Skew; 400 ps Typical Propagation Delay; Maximum Frequency > 2 GHz Typical; PECL and HSTL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V; NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V; Open Input Default State; The 100 Series Contains Temperature Compensation | Small Outline Packages | MC100EP14DTG |
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MC100ES6226AC
Renesas Electronics
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1 | MC100ES6226 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.0 GHz. Typical applications for the MC100ES6226 are primary clock distribution systems on backplanes of high-performance computer, networking and telecommunication systems, as well as on-board clocking of OC-3, OC-12 and OC-48 speed communication systems. The MC100ES6226 can be operated from a 3.3 V or 2.5 V positive supply without the requirement of a negative supply line. E | Quad Flat Packages | MC100ES6226AC |
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MC100EPT23DTR2G
onsemi
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1 | Q Output will default LOW with inputs open or at GND; 1.5ns Typical Propagation Delay; Maximum Operating Frequency > 275MHz; 24mA LVTTL Outputs; Operating Range: VCC= 3.0 V to 3.6 V with GND = 0 V; Open Input Default State; Pb-Free Packages are Available | Small Outline Packages | MC100EPT23DTR2G |
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MC100ES6130EJ
Renesas Electronics
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1 | The MC100ES6130 is a 2.5 GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of 2.5 V and 3.3 V and also features a 2:1 input MUX which is ideal for redundant clock switchover applications. This device also includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state to eliminate the possibility of a runt clock pulse. | Small Outline Packages | MC100ES6130EJ |
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MC100EL11DG
onsemi
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1 | NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V; PECL Mode Operating Range: VCC= 4.2 V to 5.7 with VEE= 0 V; ESD Protection: > 1 KV HBM, > 100 V MM; 5ps Skew Between Outputs; 265ps Propagation Delay; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 44 devices; Pb-Free Packages ar | Other | MC100EL11DG |
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MC100EL04DG
onsemi
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1 | High Bandwidth Output Transitions; 240ps Propagation Delay; >1000V ESD Protection; 75kW Internal Input Pulldown Resistors; Pb-Free Packages are Available | Small Outline Packages | MC100EL04DG |
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MC100EP131FAG
onsemi
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1 | Q Output will default LOW with inputs open or at VEE; Individual Asynchronous Resets; PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; 460ps Typical Propagation Delay; Maximum Frequency > 3 GHz Typical; Differential Individual and Common Clocks; Asynchronous Set; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available | Quad Flat Packages | MC100EP131FAG |
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MC100ES6221AE
Renesas Electronics
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1 | The MC100ES6221 is a bipolar monolithic differential clock fanout buffer. Designed for most demanding clock distribution systems, the MC100ES6221 supports various applications that require the distribution of precisely aligned differential clock signals. Using SiGe technology and a fully differential architecture, the device offers very low skew outputs and superior digital signal characteristics. Target applications for this clock driver is high performance clock distribution in computing, networking and t | Quad Flat Packages | MC100ES6221AE |
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MC100EP52DG
onsemi
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1 | 330ps Typical Propagation Delay; Maximum Frequency > 4 GHz Typical; PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V; NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V; Q Output will default LOW with inputs open or at VEE; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available | Small Outline Packages | MC100EP52DG |
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MC100EL1648DG
onsemi
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1 | ESD Protection: >2 KV HBM, >100 V MM; Typical Operating Frequency Up to 1100 MHz; Phase Noise -90 dBc/Hz at 25 kHz Typical; Low-Power 19 mA at 5.0 Vdc Power Supply; PECL Mode Operating Range: VCC= 5.0 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -5.2 V; Input Capacitance= 6.0 pF (TYP); Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Maximum Series Resistance for L (External Inductance)= 50 W (TYP); Moisture Sensitivity Level 1. For Additional Information, see Application Note AND80 | Small Outline Packages | MC100EL1648DG |
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MC100ELT20DG
onsemi
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1 | ON Semiconductor MC100ELT20DG, Logic Level Translator, TTL to PECL, 4.75 → 5.25 V, 8-Pin SOIC | Small Outline Packages | MC100ELT20DG |
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MC100ELT25DTG
onsemi
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1 | -5 V Differential ECL to TTL Translator | Small Outline Packages | MC100ELT25DTG |
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MC100EP58DG
onsemi
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1 | ON Semiconductor MC100EP58DG Multiplexer IC, 8-Pin SOIC | Other | MC100EP58DG |
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MC100EL32DG
onsemi
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1 | 5V ECL ÷2 Divider | Small Outline Packages | MC100EL32DG |
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MC100ES60T22EF
Renesas Electronics
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1 | The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator. The low voltage PECL levels, small package, and dual gate design are ideal for clock translation applications. | Small Outline Packages | MC100ES60T22EF |
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