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9ZXL1231EKILF-1K/W
Renesas Electronics
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1 | The 9ZXL1231E is a second-generation, enhanced performance DB1200ZL differential buffer. The part is a pin-compatible upgrade to the 9ZXL1231A, while offering much improved phase jitter performance and increased system security features. A fixed external feedback maintains low drift for critical QPI/UPI applications. | Quad Flat No-Lead | Check Price & Stock |
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9ZXL1251EKILFT
Renesas Electronics
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1 | The 9ZXL1251E is a second-generation, enhanced performance DB1200ZL differential buffer. The part is a pin-compatible upgrade to the 9ZXL1251A, while offering much improved phase jitter performance and increased system security features. A fixed external feedback maintains low drift for critical QPI/UPI applications. | Quad Flat No-Lead | Check Price & Stock |
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MPC9456AC
Renesas Electronics
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1 | The MPC9456 is a 2.5 V and 3.3 V compatible 1:10 clock distribution buffer designed for low-voltage mid-range to high-performance telecom, networking and computing applications. Both 3.3 V, 2.5 V and dual supply voltages are supported for mixed-voltage applications. The MPC9456 offers 10 low-skew outputs and a differential LVPECL clock input. The outputs are configurable and support 1:1 and 1:2 output to input frequency ratios. The MPC9456 is specified for the extended temperature range of –40 to 85°C. | Quad Flat Packages | Check Price & Stock |
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5V2305NRGI8
Renesas Electronics
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1 | The IDT5V2305 is a high performance, low skew clock buffer that operates up to 200MHz. One bank of five outputs provides low skew copies of CLK. Through the use of control pin G, the outputs of bank Y(0:4) can be placed in a low state regardless of CLK input. The device operates in 2.5V and 3.3V environments. The built-in output enable glitch suppression ensures a synchronized output enable sequence to distribute full period clock signals. The IDT5V2305 is characterized for operation from -40°C to +85°C. | Other | Check Price & Stock |
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672M-01LFT
Renesas Electronics
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1 | The 672-01/02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals. Based on IDT's proprietary low jitter Phase-Locked Loop (PLL) techniques, each device provides five low-skew outputs, with clock rates up to 84 MHz for the 672-01 and up to 135 MHz for the 672-02. By providing outputs delayed one quarter clock cycle, the device is useful for systems requiring early or late clocks. The 672-01/02 include multiplier selections of x0.5, x1, x2, x3, x4, x5, or x6. They | Small Outline Packages | Check Price & Stock |
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9DBU0931AKILFT
Renesas Electronics
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1 | The 9DBU0931 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. The device has 5 output enables for clock management, and 3 selectable SMBus addresses. | Quad Flat No-Lead | Check Price & Stock |
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49FCT3805BPYGI
Renesas Electronics
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1 | The FCT3805B is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805B offers low capacitance inputs with hysteresis. The FCT3805B is designed for high speed clock distribution where | Small Outline Packages | Check Price & Stock |
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49FCT3805QG
Renesas Electronics
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1 | The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si | Small Outline Packages | Check Price & Stock |
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23S08-1HDCGI8
Renesas Electronics
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1 | SOIC 150 MIL | Small Outline Packages | Check Price & Stock |
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8535AGI-01LF
Renesas Electronics
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1 | The 8535I-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer. The 8535I-01 has two single ended clock inputs. the single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/ deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8535I-01 ideal for those applications d | Small Outline Packages | Check Price & Stock |
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83905AKLF
Renesas Electronics
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1 | The 83905 is a low skew, 1-to-6 LVCMOS / LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 6 to 12 by utilizing the ability of the outputs to drive two series terminated lines. The 83905 is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply mode. Guaranteed output and part-to-part skew characteristics along with the 1.8V ou | Quad Flat No-Lead | Check Price & Stock |
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RC19024AGNQ#BB0
Renesas Electronics
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1 | The RC19024 is a 24-output PCIe Gen6 buffer that is backward compatible to earlier PCIe generations. The RC19024 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design. | Other | Check Price & Stock |
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74FCT3807EPYGI8
Renesas Electronics
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1 | The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. | Small Outline Packages | Check Price & Stock |
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5V41067APGG
Renesas Electronics
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1 | The 5V41067A is a 2:4 differential clock mux for PCI Express applications. It has very low additive jitter making it suitable for use in PCIe Gen2 and Gen3 systems. The 5V41067A selects between 1 of 2 differential HCSL inputs to fanout to 4 differential HCSL output pairs. The outputs can also be terminated to LVDS. | Small Outline Packages | Check Price & Stock |
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83052AGI-01LF
Renesas Electronics
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1 | The 83052I-01 is a 2-bit, 2:1, Single-ended Multiplexer and a member of the family of High Performance Clock Solutions from IDT. The 83052I-01 has two selectable single-ended clock inputs and two single-ended clock outputs. The output has a VDDO pin which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. Possible applications include systems with up | Small Outline Packages | Check Price & Stock |
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670M-01ILF
Renesas Electronics
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1 | The 670-01 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of IDT's ClockBlocks™ family, the part's zero delay feature means that the rising edge of the input clock aligns with the rising edges of the outputs giving the appearance of no delay through the device. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The 670-01 | Small Outline Packages | Check Price & Stock |
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74FCT3807PYGI
Renesas Electronics
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1 | The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. | Small Outline Packages | Check Price & Stock |
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9DMV0141BKILF
Renesas Electronics
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1 | The 9DMV0141 is a member of Renesas' SOC-Friendly 1.8 V Very-Low-Power (VLP) PCIe Gen1–5 family. The 9DMV0141 has integrated output terminations for direct connection to 100Ω transmission lines. The output has an OE# pin for optimal system control and power management. The parts provide asynchronous or glitch-free switching modes. | Quad Flat No-Lead | Check Price & Stock |
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8741004BGILFT
Renesas Electronics
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1 | The 8741004I is a high performance Differential-to-LVDS/0.7V Differential Jitter Attenuator designed for use in PCI Express®™ systems. In some PCI Express® systems, such as those found in desktop PCs, the PCI Express® clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 8741004I has 3 PLL bandwid | Small Outline Packages | Check Price & Stock |
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MPC942CAC
Renesas Electronics
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1 | The MPC942 is a 1:18 low voltage clock distribution chip with 2.5V or 3.3V LVCMOS output capabilities. The device is offered in two versions; the MPC942C has an LVCMOS input clock while the MPC942P has a LVPECL input clock. The 18 outputs are 2.5V or 3.3V LVCMOS compatible and feature the drive strength to drive 50? series or parallel terminated transmission lines. With output-to-output skews of 200ps, the MPC942 is ideal as a clock distribution chip for the most demanding of synchronous systems. The 2.5V o | Quad Flat Packages | Check Price & Stock |
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49FCT3805SOGI
Renesas Electronics
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1 | The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si | Small Outline Packages | Check Price & Stock |
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8536AG-01LF
Renesas Electronics
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1 | The 8536-01 is a low skew, high performance 1-to-6 Selectable Crystal, Single-Ended, or Differential Input-to-3.3V, 2.5V LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The 8536-01 has selectable crystal, single ended or differential clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translates them to LVPECL levels. The CLK1, nCLK1 pair can accept most standard differential input levels. The output enable is interna | Small Outline Packages | Check Price & Stock |
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23S09-1HDCGI8
Renesas Electronics
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1 | The IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT23S09 is a 16-pin version of the IDT23S05. The IDT23S09accepts one reference input, and drives two banks of four low skew clocks. The -1H version of this device operates up to 133MHz frequency and has higher drive than the -1 device. | Small Outline Packages | Check Price & Stock |
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49FCT3805ASOGI
Renesas Electronics
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1 | The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si | Small Outline Packages | Check Price & Stock |
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9DB433AGLFT
Renesas Electronics
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1 | The 9DB433 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB433 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. | Small Outline Packages | Check Price & Stock |
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