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Clock Drivers Model Download Search Results

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Image Part Number D.S Description Package Category Prices / Stock Model Action
Image Part Number D.S Description Package Category Prices / Stock Model Action
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CDCLVP110VFR Texas Instruments
1 Clock Drivers & Distribution 1:10 CLOCK DRIVER Quad Flat Packages Check Price & Stock 1 Download Model
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CDCM61002RHBR Texas Instruments
1 One Output, Integrated VCO, Low-Jitter Clock Generator Quad Flat No-Lead Check Price & Stock 1 Download Model
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CDCLVC1310RHBR Texas Instruments
1 Universal input, 10 output low impedance LVCMOS Buffer Quad Flat No-Lead Check Price & Stock 1 Download Model
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85108AGILF Renesas Electronics
1 The 85108I is a low skew, high performance 1-to-8 Differential-to-0.7V HCSL Clock Distribution Chip. The 85108I CLK, nCLK pair can accept most differential input levels and translates them to 3.3V HCSL output levels. The 85108I provides a low power, low noise, low skew, point-to-point solution for distributing HCSL clock signals. Guaranteed output and part-to-part skew specifications make the 85108I ideal for those applications demanding well defined performance and repeatability. Small Outline Packages Check Price & Stock 1 Download Model
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524MILFT Renesas Electronics
1 The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Small Outline Packages Check Price & Stock 1 Download Model
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49FCT3805DQGI8 Renesas Electronics
1 The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputsand complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3 Small Outline Packages Check Price & Stock 1 Download Model
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9DBL0453ANLGI8 Renesas Electronics
1 The 9DBL0453 Zero-Delay/Fanout buffer is a low-power high-performance member of Renesas' Full-Featured PCIe family. The buffer supports PCIe Gen1–5 and provides a Loss of Signal (LOS) indicator. The device is an easy upgrade from the 9DBL0452. For information regarding evaluation boards and material, please contact your local sales representative.  Quad Flat No-Lead Check Price & Stock 1 Download Model
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2308A-4DCG8 Renesas Electronics
1 The 2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308A has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the Small Outline Packages Check Price & Stock 1 Download Model
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8T79S308NLGI8 Renesas Electronics
1 The 8T79S308 is a fully integrated signal fanout buffer for high-performance, low additive phase noise applications. The main function of the device is the distribution and fanout of high-frequency clocks or low-frequency synchronization signals. The 8T79S308 is optimized to deliver very low phase noise clocks and precise, low-skew outputs, low device-to-device skew characteristics and fast output rise/fall times help the system design to achieve deterministic clock phase relationship across devices.The dev Quad Flat No-Lead Check Price & Stock 1 Download Model
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8P34S2106AHGI Renesas Electronics
1 The 8P34S2106 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V / 2.5V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has six low-skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make th BGA Check Price & Stock 1 Download Model
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74FCT3807EQGI Renesas Electronics
1 The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. Small Outline Packages Check Price & Stock 1 Download Model
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49FCT3805QGI Renesas Electronics
1 The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si Small Outline Packages Check Price & Stock 1 Download Model
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8523AGI-03LN Renesas Electronics
1 The 8523I-03 is a low skew, high performance 1-to-4 Differential-to-LVHSTL fanout buffer. The 8523I-03 has two selectable clock inputs. The input pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8523I-03 ideal for those applications demanding well defined performance and repeatability. Small Outline Packages Check Price & Stock 1 Download Model
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2309-1HPGGI Renesas Electronics
1 The 2309 is a low phase noise, high-speed PLL based, low-skew zero delay buffer. Based on ICS' proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides nine low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The 2309 is available in two different versions. The 23 Small Outline Packages Check Price & Stock 1 Download Model
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411MLF Renesas Electronics
1 The IDT411 is a cost-effective clock synthesizer developed to optimize component count for PC motherboard and peripheral applications. The device supports a common, low cost 14.31818 MHz crystal. The device locks all output frequencies to enhance system performance. By supporting common PC peripheral interface frequencies including 25 MHz for Ethernet and 24.576 MHz for audio and other applications, the device lowers chip count enhancing system cost and reliability. The IDT411 utilizes a low pin count 8-pin Small Outline Packages Check Price & Stock 1 Download Model
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8T49N4811NLGI8 Renesas Electronics
1 The 8T49N4811 is a highly flexible FemtoClock® NG pin-programmable clock generator suitable for networking and communications applications. It is able to generate five different output frequencies with multiple copies of each. A fundamental mode crystal, single-ended, or differential input reference may be used as the source for the output frequency. The use of pin-programming to select the input source / frequency, desired output frequencies and output styles allow a single device to be used in a wide vari Quad Flat No-Lead Check Price & Stock 1 Download Model
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87002AG-02LFT Renesas Electronics
1 The 87002-02 is a highly versatile 1:2 Differential-to- LVCMOS/LVTTL Clock Generator. The 87002-02 has a differential clock input. The CLK, nCLK pair can accept most standard differential input levels. Internal bias on the nCLK input allows the CLK input to accept LVCMOS/LVTTL. The 87002-02 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider and has an input and output frequency range of 15.625MHz to 250MHz. The reference divider, feedback divider and output divider Small Outline Packages Check Price & Stock 1 Download Model
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74FCT3807SQGI8 Renesas Electronics
1 The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer. The 74FCT3807S has best in class additive phase Jitter of sub 50 fsec. Small Outline Packages Check Price & Stock 1 Download Model
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87002AG-02LF Renesas Electronics
1 The 87002-02 is a highly versatile 1:2 Differential-to- LVCMOS/LVTTL Clock Generator. The 87002-02 has a differential clock input. The CLK, nCLK pair can accept most standard differential input levels. Internal bias on the nCLK input allows the CLK input to accept LVCMOS/LVTTL. The 87002-02 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider and has an input and output frequency range of 15.625MHz to 250MHz. The reference divider, feedback divider and output divider Small Outline Packages Check Price & Stock 1 Download Model
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9ZX21901DKLFT Renesas Electronics
1 The 9ZX21901D is a second generation DB1900Z differential buffer for Intel Purley and newer platforms. The part is backwards compatible to the 9ZX21901C while offering much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. In bypass mode, the 9ZX21901D can provide outputs up to 400MHz.  Quad Flat No-Lead Check Price & Stock 1 Download Model
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830S21AMILF Renesas Electronics
1 830S21I is a 1-to-1 Differential-to- LVCMOS/ LVTTL translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space. Small Outline Packages Check Price & Stock 1 Download Model
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670M-04ILFT Renesas Electronics
1 The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The ICS670-04 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communicatio Small Outline Packages Check Price & Stock 1 Download Model
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74FCT3807SPGGI8 Renesas Electronics
1 The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer. The 74FCT3807S has best in class additive phase Jitter of sub 50 fsec. Small Outline Packages Check Price & Stock 1 Download Model
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527R-01ILFT Renesas Electronics
1 The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MH Small Outline Packages Check Price & Stock 1 Download Model
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83052AGI-01LFT Renesas Electronics
1 The 83052I-01 is a 2-bit, 2:1, Single-ended Multiplexer and a member of the family of High Performance Clock Solutions from IDT. The 83052I-01 has two selectable single-ended clock inputs and two single-ended clock outputs. The output has a VDDO pin which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. Possible applications include systems with up Small Outline Packages Check Price & Stock 1 Download Model
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