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74FCT3807PYGI
Renesas Electronics
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1 | The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. | Small Outline Packages | 74FCT3807PYGI |
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9DMV0141BKILF
Renesas Electronics
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1 | The 9DMV0141 is a member of Renesas' SOC-Friendly 1.8 V Very-Low-Power (VLP) PCIe Gen1–5 family. The 9DMV0141 has integrated output terminations for direct connection to 100Ω transmission lines. The output has an OE# pin for optimal system control and power management. The parts provide asynchronous or glitch-free switching modes. | Quad Flat No-Lead | 9DMV0141BKILF |
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2309NZ-1HDCGI
Renesas Electronics
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1 | The IDT2309NZ is a low-cost buffer designed to distribute high-speed clocks in mobile PC systems and desktop PC systems with SDRAM support. This part has nine outputs, eight of which can be used to drive two DIMMs or four SO-DIMMs, and the remaining can be used for external feedback to a PLL. The IDT2309NZ operates at 3.3V and outputs can run up to 133.33MHz The IDT2309NZ is designed for low EMI and power optimization. It has multiple VDD and VSS pins for noise optimization and consumes less than 32mA at 66 | Small Outline Packages | 2309NZ-1HDCGI |
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9ZXL0651AKLF
Renesas Electronics
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1 | The 9ZXL0651 is a low-power 6-output differential buffer that meets all the performance requirements of the Intel DB1200Z specification. It consumes 50% less power than standard HCSL devices and has internal terminations to allow direct connection to 85 ohm transmission lines. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications. | Quad Flat No-Lead | 9ZXL0651AKLF |
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9112AG-16LF
Renesas Electronics
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1 | The IDT9112-16 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 25 to 133 MHz. | Small Outline Packages | 9112AG-16LF |
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8P34S1204NLGI8
Renesas Electronics
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1 | The 8P34S1204 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals. The 8P34S1204 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1204 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable diffe | Quad Flat No-Lead | 8P34S1204NLGI8 |
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8S89833AKILFT
Renesas Electronics
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1 | The 8S89833I is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer with Internal Termination. The 8S89833I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and CML to be easily interfaced to the input with minimal use of external components. The device also | Quad Flat No-Lead | 8S89833AKILFT |
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9DB633AFILFT
Renesas Electronics
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1 | The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | 9DB633AFILFT |
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49FCT3805BPYGI
Renesas Electronics
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1 | The FCT3805B is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805B offers low capacitance inputs with hysteresis. The FCT3805B is designed for high speed clock distribution where | Small Outline Packages | 49FCT3805BPYGI |
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MK2304S-1ILFT
Renesas Electronics
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1 | The MK2304-1 is a low jitter, low skew, high performance Phase Lock Loop (PLL) based zero delay buffer for high speed applications. Based on IDT's proprietary low jitter PLL techniques, the device provides four low skew outputs at speeds up to 133 MHz at 3.3 V. The MK2304-1 includes two banks of two outputs each 1X. In the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all 4 outputs. Compared to competitive CMOS devices, the MK2304-1 has the lowest jitter. IDT manufa | Small Outline Packages | MK2304S-1ILFT |
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23S08E-4DCGI
Renesas Electronics
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1 | 3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible | Small Outline Packages | 23S08E-4DCGI |
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672M-01LFT
Renesas Electronics
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1 | The 672-01/02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals. Based on IDT's proprietary low jitter Phase-Locked Loop (PLL) techniques, each device provides five low-skew outputs, with clock rates up to 84 MHz for the 672-01 and up to 135 MHz for the 672-02. By providing outputs delayed one quarter clock cycle, the device is useful for systems requiring early or late clocks. The 672-01/02 include multiplier selections of x0.5, x1, x2, x3, x4, x5, or x6. They | Small Outline Packages | 672M-01LFT |
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MC100LVEP210FARG
onsemi
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1 | Maximum Frequency >3 Ghz; NECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V; 85 ps Typical Device-to-Device Skew; VBBOutput; PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V; 350 ps Typical Propagation Delay; 20 ps Typical Output-to-Output Skew; Jitter Less than 1 ps RMS; The 100 Series Contains Temperature Compensation; Open Input Default State; LVDS Input Compatible | Quad Flat Packages | MC100LVEP210FARG |
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5T30553DCG
Renesas Electronics
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1 | The IDT5T30553 is a low skew, single input to four output, clock buffer. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. | Small Outline Packages | 5T30553DCG |
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23S08E-2DCG
Renesas Electronics
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1 | 3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible | Small Outline Packages | 23S08E-2DCG |
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9DMU0141AKILF
Renesas Electronics
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1 | The 9DMU0141 is a member of IDT's SOC-Friendly 1.5 V Ultra-Low-Power (ULP) PCIe Gen1-2-3 family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. The output has an OE# pin for optimal system control and power management. The part provides asynchronous or glitch-free switching modes. | Quad Flat No-Lead | 9DMU0141AKILF |
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74FCT3807EQGI
Renesas Electronics
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1 | The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. | Small Outline Packages | 74FCT3807EQGI |
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524MILFT
Renesas Electronics
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1 | The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. | Small Outline Packages | 524MILFT |
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49FCT3805DQGI8
Renesas Electronics
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1 | The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputsand complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3 | Small Outline Packages | 49FCT3805DQGI8 |
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8T79S308NLGI8
Renesas Electronics
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1 | The 8T79S308 is a fully integrated signal fanout buffer for high-performance, low additive phase noise applications. The main function of the device is the distribution and fanout of high-frequency clocks or low-frequency synchronization signals. The 8T79S308 is optimized to deliver very low phase noise clocks and precise, low-skew outputs, low device-to-device skew characteristics and fast output rise/fall times help the system design to achieve deterministic clock phase relationship across devices.The dev | Quad Flat No-Lead | 8T79S308NLGI8 |
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2308B-1DCGI
Renesas Electronics
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1 | The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the | Small Outline Packages | 2308B-1DCGI |
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9ZXL0852EKILF
Renesas Electronics
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1 | The 9ZXL0852E is a second-generation, enhanced performance DB800ZL differential buffer. The part is pin-compatible to the 9ZXL0851A while offering a much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. The 9ZXL0852E has an SMBus Write Lockout pin for increased device and system security. | Quad Flat No-Lead | 9ZXL0852EKILF |
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MC100ES6011EFR2
Renesas Electronics
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1 | The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage. The 100ES Series contains temperature compensation. | Small Outline Packages | MC100ES6011EFR2 |
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8735BYI-01LF
Renesas Electronics
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1 | The 8735BI-01 is a highly versatile 1:5 Differential- to-3.3V LVPECL clock generator. The 8735BI-01 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to achieve “zero delay” between the | Quad Flat Packages | 8735BYI-01LF |
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RC19304A001GNL#BB0
Renesas Electronics
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1 | The RC19304 is a 2:4 PCIe Gen7 multiplexer that is backward compatible with earlier PCIe generations. The RC19304 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design. | Quad Flat No-Lead | RC19304A001GNL#BB0 |
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