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	9DB233AFILFT Renesas Electronics	1	The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D	Small Outline Packages	9DB233AFILFT	3D model available Symbol and footprint available 3	1 Download Model
	9DB633AFLFT Renesas Electronics	1	The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D	Small Outline Packages	9DB633AFLFT	3D model available Symbol and footprint available 3	1 Download Model
	9DB233AGLFT Renesas Electronics	1	The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D	Small Outline Packages	9DB233AGLFT	3D model available Symbol and footprint available 3	1 Download Model
	9DB633AGILF Renesas Electronics	1	The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D	Small Outline Packages	9DB633AGILF	3D model available Symbol and footprint available 3	1 Download Model

	IW1782-03 Renesas Electronics	1	The iW1782 is a high-performance AC/DC power supply controller for rapid charge that uses digital control technology to build peak current mode PWM flyback power supplies. The iW1782 is optimized to work with Renesas' iW636 secondary-side controller for Qualcomm® Quick Charge™ 3.0 technology to achieve fast and smooth voltage transition upon request by mobile devices (MD). When paired with the iW636, the iW1782 eliminates the discrete decoders on the primary side, minimizes the external component count and	Small Outline Packages	IW1782-03	3D model available Symbol and footprint available 3	1 Download Model
	9DB106BGILFT Renesas Electronics	1	The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications.	Small Outline Packages	9DB106BGILFT	3D model available Symbol and footprint available 3	1 Download Model
	MPXA4250AC6U NXP	1	NXP - MPXA4250AC6U - IC, PRESSURE SENSOR	Small Outline Packages	MPXA4250AC6U	3D model available Symbol and footprint available 3	1 Download Model
	ABPDANN005PG2A3 Honeywell	1	ABPDANN005PG2A3, Differential Pressure Sensor 5psi 6-Pin DIP	Other	ABPDANN005PG2A3	3D model available Symbol and footprint available 3	1 Download Model
	LM2696MXAX/NOPB Texas Instruments	1	3A, Constant On Time Buck Regulator	Small Outline Packages	LM2696MXAX/NOPB	3D model available Symbol and footprint available 3	1 Download Model
	NPA-730B-005D Amphenol	1	Board Mount Pressure Sensors	Other	NPA-730B-005D	3D model available Symbol and footprint available 3	1 Download Model
	MPXV5004GP NXP	1	Board Mount Pressure Sensors SOP side PORT	Other	MPXV5004GP	3D model not available Symbol and footprint available 2	1 Download Model
	9DB633AGLFT Renesas Electronics	1	The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D	Small Outline Packages	9DB633AGLFT	3D model available Symbol and footprint available 3	1 Download Model
	IW1782-05 Renesas Electronics	1	The iW1782 is a high-performance AC/DC power supply controller for rapid charge that uses digital control technology to build peak current mode PWM flyback power supplies. The iW1782 is optimized to work with Renesas' iW636 secondary-side controller for Qualcomm® Quick Charge™ 3.0 technology to achieve fast and smooth voltage transition upon request by mobile devices (MD). When paired with the iW636, the iW1782 eliminates the discrete decoders on the primary side, minimizes the external component count and	Small Outline Packages	IW1782-05	3D model available Symbol and footprint available 3	1 Download Model
	MPXA4250AC6U NXP	1	NXP - MPXA4250AC6U - IC, PRESSURE SENSOR	Small Outline Packages	MPXA4250AC6U	3D model available Symbol and footprint available 3	1 Download Model
	TPIC83000IPWRQ1 Texas Instruments	1	Automotive Catalog Pressure Sensor Signal Conditioner	Small Outline Packages	TPIC83000IPWRQ1	3D model available Symbol and footprint available 3	1 Download Model

	MPXA6115AC6U NXP	1	Pressure Sensor 115kPa MAP Absolute Port Pressure Sensor 115kPa MAP Absolute Port	Small Outline Packages	MPXA6115AC6U	3D model available Symbol and footprint available 3	1 Download Model
	SP370251160XTMA3 Infineon	1	Board Mount Pressure Sensors TPMS & INERTIA	Small Outline Packages	SP370251160XTMA3	3D model available Symbol and footprint available 3	1 Download Model
	9DB233AGILF Renesas Electronics	1	The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D	Small Outline Packages	9DB233AGILF	3D model available Symbol and footprint available 3	1 Download Model
	LPS22HHTR STMicroelectronics	1	STMICROELECTRONICS - LPS22HHTR - PRESSURE SENSOR, HLGA-10	Other	LPS22HHTR	3D model available Symbol and footprint available 3	1 Download Model
	72V3660L7-5BB Renesas Electronics	1	The 72V3660 4K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3660L7-5BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3690L7-5BB Renesas Electronics	1	The 72V3690 32K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3690L7-5BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3660L7-5BB8 Renesas Electronics	1	The 72V3660 4K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3660L7-5BB8	3D model available Symbol and footprint available 3	1 Download Model
	72V3640L6BB8 Renesas Electronics	1	The 72V3640 1K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3640L6BB8	3D model available Symbol and footprint available 3	1 Download Model
	72V3690L7-5PFGI Renesas Electronics	1	The 72V3690 32K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3690L7-5PFGI	3D model available Symbol and footprint available 3	1 Download Model
	72V3680L7-5PF Renesas Electronics	1	The 72V3680 16K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3680L7-5PF	3D model available Symbol and footprint available 3	1 Download Model
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