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Image Part Number D.S Description Package Category Prices / Stock Model Action
Image Part Number D.S Description Package Category Prices / Stock Model Action
Part Image Part Image 1 Q Output will default LOW with inputs open or at GND; 1.5ns Typical Propagation Delay; Maximum Operating Frequency > 275MHz; 24mA LVTTL Outputs; Operating Range: VCC= 3.0 V to 3.6 V with GND = 0 V; Open Input Default State; Pb-Free Packages are Available Small Outline Packages MC100EPT23DTG 1 Download Model
Part Image Part Image 1 Open Input Default State; 240 ps Typical Propagation Delay; Q Outputs will default LOW with inputs open or at VEE; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V; LVDS Input Compatible Small Outline Packages MC100LVEP11DTG 1 Download Model
Part Image Part Image 1 Open Input Default State; 240 ps Typical Propagation Delay; Q Outputs will default LOW with inputs open or at VEE; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V; LVDS Input Compatible Small Outline Packages MC100LVEP11DTR2G 1 Download Model
Part Image Part Image 1 250 ps Typical Propagation Delay; Maximum Frequency > 3 Ghz Typical; NECL Mode Operating Range: VCC=0 V with VEE = -3.0V to -5.5V; PECL mode Operating Range: 3.0V to 5.5V VCC with VEE = 0V; Open Input Default State; Pb-Free Packages are Available Quad Flat No-Lead MC100EP101MNG 1 Download Model
Part Image Part Image 1 PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V; Synchronous Enable/Disable; Multiplexed Clock Input; 50ps Output-to-Output Skew; ESD Protection: > 1 KV HBM, > 100 V MM; NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V; Internal Input Pulldown Resistors on CLKs, SCLK, SEL, and ENbar.; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Other MC100EL15DG 1 Download Model
Part Image Part Image 1 Open Input Default State; 320ps Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V; Q Output will default LOW with inputs open or at VEE; Maximum Frequency > 4 GHz Typical; VBB Output; Safety Clamp on Inputs; Pb-Free Packages are Available Small Outline Packages MC100EP33DTG 1 Download Model
Part Image Part Image 1 The 100 Series Contains Temperature Compensation; Q Output will Default LOW with Inputs Open or at GND; Operating Range: VCC = 3.8 V to 3.3 V; VEE = -3.0 V to -3.8 V; GND= 0 V; 620 ps Typical Propagation Delay; Pb-Free Packages are Available Small Outline Packages MC100LVEL91DWG 1 Download Model
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MC100ES60T23EFR2 Renesas Electronics
1 The MC100ES60T23 is a dual differential LVPECL-to-LVTTL translator. The low voltage PECL levels, small package, and dual gate design is ideal for clock translation applications. Small Outline Packages MC100ES60T23EFR2 1 Download Model
Part Image Part Image 1 220 ps Propagation Delay; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; Maximum Frequency > 4 GHz Typical (See Graph); PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; Open Input Default State; Safety Clamp on Inputs; Q Output Will Default LOW with Inputs Open or at VEE; VBB Output Small Outline Packages MC100EP16DTG 1 Download Model
Part Image Part Image 1 220 ps Typical Propagation Delay; Maximum Frequency >3.0 GHz Typical; PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V; Open Input Default State; Safety Clamp on Inputs; Q Output Will Default LOW with Inputs Open or at VEE; VBB Output Small Outline Packages MC100EP17DTG 1 Download Model
Part Image Part Image 1 ON Semiconductor MC100EP57MNG, Quad Multiplexer IC, Multiplexer, 1-of-4, 20-Pin QFN Quad Flat No-Lead MC100EP57MNG 1 Download Model
Part Image Part Image 1 Clock Drivers & Distribution BBG ECL Clock Driver Plastic Leaded Chip Carrier MC100E111FNR2G 1 Download Model
Part Image Part Image 1 Clock Generators & Support Products 3.3V/5V ECL Clock Generator Small Outline Packages MC100EP139DTG 1 Download Model
Part Image Part Image 1 IC RIPPLE COUNTER 8BIT HS 28PLCC Plastic Leaded Chip Carrier MC100E137FNR2G 1 Download Model
Part Image Part Image 1 TTL/CMOS to PECL Translator Small Outline Packages MC100LVELT20DG 1 Download Model
Part Image Part Image 1 Mixed Signal Translator Unidirectional 1 Circuit 1 Channel 8-TSSOP Small Outline Packages MC100ELT20DTG 1 Download Model
Part Image Part Image 1 Synchronous Binary Up Counter Other MC100E016FNG 1 Download Model
Part Image Part Image 1 <100ps Output-to-Output Skew; Flow Through Pinouts; ESD Protection: >4 KV HBM, >200 V MM; The 100 Series Contains Temperature Compensation; 350ps Typical Propagation Delay; LVPECL Operating Range: VCC= 3.15 V to 3.45 V with GND= 0 V; When Unused TTL Input is left Open, Q Output will Default High; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Tr Small Outline Packages MC100LVELT22DTG 1 Download Model
Part Image Part Image 1 <100ps Output-to-Output Skew; Flow Through Pinouts; ESD Protection: >4 KV HBM, >200 V MM; The 100 Series Contains Temperature Compensation; 350ps Typical Propagation Delay; LVPECL Operating Range: VCC= 3.15 V to 3.45 V with GND= 0 V; When Unused TTL Input is left Open, Q Output will Default High; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Tr Small Outline Packages MC100LVELT22DG 1 Download Model
Part Image Part Image 1 Maximum Frequency > 1.1 GHz; 420 ps Typical Propagation Delay; PNP LVTTL Inputs for Minimal Loading; Q Output will default HIGH with inputs open; The 100 Series contains temperature compensation.; Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V; Pb-Free Packages are Available Small Outline Packages MC100EPT22DG 1 Download Model
Part Image Part Image 1 ESD Protection: >4 KV HBM, >200 V MM; The 100 Series Contains Temperature Compensation; 5 ps Skew Between Outputs; High Bandwidth Output Transitions; 330 ps Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE = -3.0 V to -3.8 V; Internal Input Pulldown Resistors; Q Output will Default LOW with Inputs Open or at VEE; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see App Small Outline Packages MC100LVEL11DG 1 Download Model
Part Image Part Image 1 Operating Range V CC = 3.0V to 3.6V with GND = 0; Q Output will default HIGH with inputs open; 390ps Typical Propagation Delay; Maximum Frequency > 1 Ghz Typical; PNP TTL Inputs for Minimal Loading Small Outline Packages MC100EPT20DG 1 Download Model
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MC100ES6014EJR2 Renesas Electronics
1 The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL and LVDS inputs can be used when the ES6014 is operating under PECL conditions. The ES6014 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure that Small Outline Packages MC100ES6014EJR2 1 Download Model
Part Image Part Image 1 220 ps Propagation Delay; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; Maximum Frequency > 4 GHz Typical (See Graph); PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; Open Input Default State; Safety Clamp on Inputs; Q Output Will Default LOW with Inputs Open or at VEE; VBB Output Small Outline Packages MC100EP16DTR2G 1 Download Model
Part Image Part Image 1 LVPECL Operating Range: LVCC = 3.0 V to 3.8 V; ESD Protection: >2 KV HBM, >200 V MM; The 100 Series Contains Temperature Compensation; 500ps Propagation Delays; 5V and 3.3V Supplies Required; PECL Operating Range: VCC = 4.5 V to 5.5 V; Internal Input Pulldown Resistors; Q Output will Default LOW with Inputs Open or < GND+1.3 V; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 247 devices; Pb-Free Packages are Availa Small Outline Packages MC100LVEL92DWG 1 Download Model
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