MC100 Footprint, Symbol and 3D Model search results

Showing 25 of 66518 results

Price & Stock Powered by

Filter by Manufacturer

Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	MC100LVEP11DTR2G onsemi	1	Open Input Default State; 240 ps Typical Propagation Delay; Q Outputs will default LOW with inputs open or at VEE; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V; LVDS Input Compatible	Small Outline Packages	MC100LVEP11DTR2G	3D model available Symbol and footprint available 3	1 Download Model
	MC100EPT23DTG onsemi	1	Q Output will default LOW with inputs open or at GND; 1.5ns Typical Propagation Delay; Maximum Operating Frequency > 275MHz; 24mA LVTTL Outputs; Operating Range: VCC= 3.0 V to 3.6 V with GND = 0 V; Open Input Default State; Pb-Free Packages are Available	Small Outline Packages	MC100EPT23DTG	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVEL16DR2G onsemi	1	300 ps Propagation Delay; ESD Protection: >2 KV HBM, > 200 V MM; The 100 Series Contains Temperature Compensation; High Bandwidth Output Transitions; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -3.8 V; Internal Input Pulldown Resistors on D, Pullup and Pulldown Resistors on Dbar; Q Output will Default LOW with Inputs Open or at VEE; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Inf	Small Outline Packages	MC100LVEL16DR2G	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP33DTG onsemi	1	Open Input Default State; 320ps Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V; Q Output will default LOW with inputs open or at VEE; Maximum Frequency > 4 GHz Typical; VBB Output; Safety Clamp on Inputs; Pb-Free Packages are Available	Small Outline Packages	MC100EP33DTG	3D model available Symbol and footprint available 3	1 Download Model

	MC100EPT26DG onsemi	1	Maximum Frequency > 275 MHz Typical; VBB Output; The 100 Series Contains Temperature Compensation; 24mA TTL outputs; Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V; Q Outputs will default LOW with inputs open or at VEE; 1.4ns Typical Propagation Delay; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available	Small Outline Packages	MC100EPT26DG	3D model available Symbol and footprint available 3	1 Download Model
	MC100ES60T23EFR2 Renesas Electronics	1	The MC100ES60T23 is a dual differential LVPECL-to-LVTTL translator. The low voltage PECL levels, small package, and dual gate design is ideal for clock translation applications.	Small Outline Packages	MC100ES60T23EFR2	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVEL91DWG onsemi	1	The 100 Series Contains Temperature Compensation; Q Output will Default LOW with Inputs Open or at GND; Operating Range: VCC = 3.8 V to 3.3 V; VEE = -3.0 V to -3.8 V; GND= 0 V; 620 ps Typical Propagation Delay; Pb-Free Packages are Available	Small Outline Packages	MC100LVEL91DWG	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP16DTG onsemi	1	220 ps Propagation Delay; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; Maximum Frequency > 4 GHz Typical (See Graph); PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; Open Input Default State; Safety Clamp on Inputs; Q Output Will Default LOW with Inputs Open or at VEE; VBB Output	Small Outline Packages	MC100EP16DTG	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP17DTG onsemi	1	220 ps Typical Propagation Delay; Maximum Frequency >3.0 GHz Typical; PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V; Open Input Default State; Safety Clamp on Inputs; Q Output Will Default LOW with Inputs Open or at VEE; VBB Output	Small Outline Packages	MC100EP17DTG	3D model available Symbol and footprint available 3	1 Download Model
	MC100EL15DG onsemi	1	PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V; Synchronous Enable/Disable; Multiplexed Clock Input; 50ps Output-to-Output Skew; ESD Protection: > 1 KV HBM, > 100 V MM; NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V; Internal Input Pulldown Resistors on CLKs, SCLK, SEL, and ENbar.; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen	Other	MC100EL15DG	3D model available Symbol and footprint available 3	1 Download Model
	MC100E137FNR2G onsemi	1	IC RIPPLE COUNTER 8BIT HS 28PLCC	Plastic Leaded Chip Carrier	MC100E137FNR2G	3D model not available Symbol and footprint available 2	1 Download Model
	MC100LVELT20DG onsemi	1	TTL/CMOS to PECL Translator	Small Outline Packages	MC100LVELT20DG	3D model available Symbol and footprint available 3	1 Download Model
	MC100E111FNR2G onsemi	1	Clock Drivers & Distribution BBG ECL Clock Driver	Plastic Leaded Chip Carrier	MC100E111FNR2G	3D model not available Symbol and footprint available 2	1 Download Model
	MC100EP57MNG onsemi	1	ON Semiconductor MC100EP57MNG, Quad Multiplexer IC, Multiplexer, 1-of-4, 20-Pin QFN	Quad Flat No-Lead	MC100EP57MNG	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP139DTG onsemi	1	Clock Generators & Support Products 3.3V/5V ECL Clock Generator	Small Outline Packages	MC100EP139DTG	3D model available Symbol and footprint available 3	1 Download Model

	MC100ELT20DTG onsemi	1	Mixed Signal Translator Unidirectional 1 Circuit 1 Channel 8-TSSOP	Small Outline Packages	MC100ELT20DTG	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP52MNR4G onsemi	1	Flip Flop 1 Element D-Type 1 Bit Positive, Negative 8-VFDFN Exposed Pad	Small Outline No-lead	MC100EP52MNR4G	3D model available Symbol and footprint available 3	1 Download Model
	MC100EL32DR2G onsemi	1	NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V; 3.0GHz Toggle Frequency; ESD Protection: > 1 KV HBM, > 100 V MM; PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V; 510ps Propagation Delay; Internal Input Pulldown Resistors on CLK(s) and R.; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 82 devices	Small Outline Packages	MC100EL32DR2G	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP57DTG onsemi	1	 375 ps Typical Propagation Delays Maximum Frequency > 2 GHz Typical PECL Mode Operating Range:VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode Operating Range:VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State Safety Clamp on Inputs Q Output will default LOW with inputs open or at VEE VBB Outputs Useful as Either 4:1 or 2:1 Multiplexer These Devices are Pb−Free and are RoHS Compliant	Small Outline Packages	MC100EP57DTG	3D model available Symbol and footprint available 3	1 Download Model
	MC100EP101FAG onsemi	1	250 ps Typical Propagation Delay; Maximum Frequency > 3 Ghz Typical; NECL Mode Operating Range: VCC=0 V with VEE = -3.0V to -5.5V; PECL mode Operating Range: 3.0V to 5.5V VCC with VEE = 0V; Open Input Default State; Pb-Free Packages are Available	Quad Flat Packages	MC100EP101FAG	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVEP11MNR4G onsemi	1	Open Input Default State; 240 ps Typical Propagation Delay; Q Outputs will default LOW with inputs open or at VEE; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V; LVDS Input Compatible	Small Outline No-lead	MC100LVEP11MNR4G	3D model available Symbol and footprint available 3	1 Download Model
	MC100ES6226ACR2 Renesas Electronics	1	MC100ES6226 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.0 GHz. Typical applications for the MC100ES6226 are primary clock distribution systems on backplanes of high-performance computer, networking and telecommunication systems, as well as on-board clocking of OC-3, OC-12 and OC-48 speed communication systems. The MC100ES6226 can be operated from a 3.3 V or 2.5 V positive supply without the requirement of a negative supply line. E	Quad Flat Packages	MC100ES6226ACR2	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVELT23MNRG onsemi	1	2.0ns Typical Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with GND= 0 V; Maximum Frequency > 180 MHz; Flow Through Pinouts; Internal Pulldown Resistors; Differential LVPECL Inputs; 24 mA LVTTL Outputs; Q Output will default LOW with inputs open or at GND; ESD Protection: >1.5 KV HBM, >100 V MM; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxyge	Small Outline No-lead	MC100LVELT23MNRG	3D model available Symbol and footprint available 3	1 Download Model
	MC100ES6254ACR2 Renesas Electronics	1	MC100ES6254 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.0 GHz. Typical applications for the MC100ES6254 are primary clock distribution, switching and loopback systems of high-performance computer, networking and telecommunication systems, as well as on-board clocking of OC-3, OC-12 and OC-48 speed communication systems. Primary purpose of the MC100ES6254 is high-speed clock switching applications. In addition, the MC100ES6254 can	Quad Flat Packages	MC100ES6254ACR2	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVELT23DR2G onsemi	1	2.0ns Typical Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with GND= 0 V; Maximum Frequency > 180 MHz; Flow Through Pinouts; Internal Pulldown Resistors; Differential LVPECL Inputs; 24 mA LVTTL Outputs; Q Output will default LOW with inputs open or at GND; ESD Protection: >1.5 KV HBM, >100 V MM; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxyge	Small Outline Packages	MC100LVELT23DR2G	3D model available Symbol and footprint available 3	1 Download Model
1 2 3 4 5 6 7 8 9

Can't find what you're looking for? Request this part

MC100 Model Download Search Results

Popular Clock Drivers