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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	PCA9306DCUTG4 Texas Instruments	1	2-bit bidirectional I2C bus and SMBus voltage-level shifter	Small Outline Packages	PCA9306DCUTG4	3D model available Symbol and footprint available 3	1 Download Model
	NTB0102GF,115 NXP	1	Translation - Voltage Levels DUAL XCVR AUTO DRECT SENSING; 3-STATE	Other	NTB0102GF,115	3D model available Symbol and footprint available 3	1 Download Model
	MC100ELT25DTG onsemi	1	-5 V Differential ECL to TTL Translator	Small Outline Packages	MC100ELT25DTG	3D model available Symbol and footprint available 3	1 Download Model
	MC100ELT20DG onsemi	1	ON Semiconductor MC100ELT20DG, Logic Level Translator, TTL to PECL, 4.75 → 5.25 V, 8-Pin SOIC	Small Outline Packages	MC100ELT20DG	3D model available Symbol and footprint available 3	1 Download Model

	MAX3002ETP+T Analog Devices	1	+1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators.	Other	MAX3002ETP+T	3D model available Symbol and footprint available 3	1 Download Model
	LSF0108PWJ Nexperia	1	Translation - Voltage Levels 8BIT BI MULTIVOLT LEVEL TRANS	Small Outline Packages	LSF0108PWJ	3D model available Symbol and footprint available 3	1 Download Model
	HCC40109BDT STMicroelectronics	1	Translation - Voltage Levels Rad-hard quad low-to-high voltage level shifter	Ceramic Dual-In-Line Packages	HCC40109BDT	3D model not available Symbol and footprint available 2	1 Download Model
	FXL2T245L10X onsemi	1	8kV HBM I/O to GND ESD (per JESD22-A114 & Mil Std 883e 3015.7) ; Bi-directional interface between any 2 levels from 1.1V to 3.6V; No power-up sequencing required; Control inputs (T/R#, OE#) levels are referenced to VCCA voltage; 4kV HBM ESD (per JESD22-A114 & Mil Std 883e 3015.7) ; Non-preferential power-up sequencing; either VCC may be powered-up first; 1kV CDM ESD (per ESD STM 5.3) ; Power-off protection; Fully configurable, inputs track VCC level; Outputs switch to 3-STATE if either VCC is at GND; 200V M	Other	FXL2T245L10X	3D model available Symbol and footprint available 3	1 Download Model
	85322AMILFT Renesas Electronics	1	The 85322I is a Dual LVCMOS / LVTTL-to- Differential 2.5V / 3.3V LVPECL translator. The 85322I has selectable single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 2.5V / 3.3V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85322AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	508MILF Renesas Electronics	1	The 508 is the most cost effective way to generate a high quality, high frequency CMOS clock output from a PECL clock input. The 508 has separate VDD supplies for the PECL input buffer and the output buffer, allowing different voltages to be used. For example, the input clock could use a 3.3 V supply while the output operates from 2.5V. The device has an Output Enable pin that tri-states the clock output when the OE pin is taken low. The 508 is a member of IDT's ClockBlocksTM family.	Small Outline Packages	508MILF	3D model available Symbol and footprint available 3	1 Download Model
	NLA9306MU3TCG onsemi	1	2-bit Bidirectional Translator for SDA and SCL Lines in MixedMode I2C Bus Applications; StandardMode, FastMode, and FastMode Plus I2C Bus and SMBus Compatible; Less Than 1.5 ns Maximum Propagation Delay to Accommodate StandardMode and FastMode I2C Bus Devices and Multiple Masters; Allows Voltage Level Translation Between: 1.0 V Vref(1) and 1.8 V, 2.5 V, 3.3 V or 5 V Vbias(ref)(2) 1.2 V Vref(1) and 1.8 V, 2.5 V, 3.3 V or 5 V Vbias(ref)(2) 1.8 V Vref(1) and 3.3 V or 5 V Vbias(ref)(2) 2.5 V Vref(1) and 5 V Vbi	Other	NLA9306MU3TCG	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVELT23MNRG onsemi	1	2.0ns Typical Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with GND= 0 V; Maximum Frequency > 180 MHz; Flow Through Pinouts; Internal Pulldown Resistors; Differential LVPECL Inputs; 24 mA LVTTL Outputs; Q Output will default LOW with inputs open or at GND; ESD Protection: >1.5 KV HBM, >100 V MM; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxyge	Small Outline No-lead	MC100LVELT23MNRG	3D model available Symbol and footprint available 3	1 Download Model
	MAX14842ATE+ Analog Devices	1	6-Channel, Digital Ground-Level Translator	Quad Flat No-Lead	MAX14842ATE+	3D model available Symbol and footprint available 3	1 Download Model
	MC14504BDR2G onsemi	1	3 to 18 Vdc Operation for VDD and VCC; No Sequencing Required on Power Supplies or Inputs for Power Up or Power Down; Input Threshold Can Be Shifted for TTL Compatibility; UP Translates from a Low to a High Voltage or DOWN Translates from a High to a Low Voltage; Diode Protected Inputs to VSS; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packages are Available*	Small Outline Packages	MC14504BDR2G	3D model available Symbol and footprint available 3	1 Download Model
	MC100LVELT23DR2G onsemi	1	2.0ns Typical Propagation Delay; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with GND= 0 V; Maximum Frequency > 180 MHz; Flow Through Pinouts; Internal Pulldown Resistors; Differential LVPECL Inputs; 24 mA LVTTL Outputs; Q Output will default LOW with inputs open or at GND; ESD Protection: >1.5 KV HBM, >100 V MM; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxyge	Small Outline Packages	MC100LVELT23DR2G	3D model available Symbol and footprint available 3	1 Download Model

	MC100EPT21MNR4G onsemi	1	Translation - Voltage Levels Diff LVPECL to LVTTL	Small Outline No-lead	MC100EPT21MNR4G	3D model available Symbol and footprint available 3	1 Download Model
	MC100ES60T23EF Renesas Electronics	1	The MC100ES60T23 is a dual differential LVPECL-to-LVTTL translator. The low voltage PECL levels, small package, and dual gate design is ideal for clock translation applications.	Small Outline Packages	MC100ES60T23EF	3D model available Symbol and footprint available 3	1 Download Model
	ADG3304BRUZ Analog Devices	1	Bidirectional level translationOperates from 1.15 V to 5.5 VLow quiescent current < 5 µANo direction pinQualified for automotive applicationsAPPLICATIONSSPI, MICROWIRE level translationLow voltage ASIC level translationSmart card readersCell phones and cell phone cradlesPortable communications devicesTelecommunications equipmentNetwork switches and routersStorage systems (SAN/NAS)Computing/server applicationsGPSPortable POS systemsLow cost serial interfaces	Small Outline Packages	ADG3304BRUZ	3D model available Symbol and footprint available 3	1 Download Model
	TPT24857-WS8R-S 3Peak Incorporated	1	SD card level shift, 208MHz, 20-WLCSP	BGA	TPT24857-WS8R-S	3D model available Symbol and footprint available 3	1 Download Model
	TPT29306-VS1R 3Peak Incorporated	1	Dual Bidirectional Voltage-Level Translator 8-MSOP	Small Outline Packages	TPT29306-VS1R	3D model available Symbol and footprint available 3	1 Download Model
	FXMAR2104UMX onsemi	1	Packaged in 12-Lead Ultrathin MLP (1.8mm x 1.8mm); Internal 10KΩ Pull-Up Resistors; Direction Control not Needed; Fully Configurable: Inputs and Outputs Track VCC ; Open-Drain Inputs / Outputs; Bi-Directional Interface between Any Two Levels: 1.65V to 5.5V; Tolerant Output Enable: 5V; ESD Protection Exceeds: - 5kV HBM ESD (per JESD22-A114) - 2kV CDM (per JESD22-C101); Non-Preferential Power-Up; Either VCC May Be Powered-Up First; Accommodates Standard-Mode and Fast-Mode I2C-Bus Devices; I2C 400pF Buffer / R	Quad Flat No-Lead	FXMAR2104UMX	3D model available Symbol and footprint available 3	1 Download Model
	NXB0102GTX Nexperia	1	TRANSLATING TRANSCEIVER, -40 TO 125DEG C ROHS COMPLIANT: YES	Other	NXB0102GTX	3D model available Symbol and footprint available 3	1 Download Model
	MAX9406ETM+T Analog Devices	1	MAX9406ETM+T	Quad Flat No-Lead	MAX9406ETM+T	3D model available Symbol and footprint available 3	1 Download Model
	85222AM-01LF Renesas Electronics	1	The 85222-01 is a Dual LVCMOS / LVTTL-to- Differential HSTL translator. The 85222-01 has two single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translates them to HSTL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85222AM-01LF	3D model available Symbol and footprint available 3	1 Download Model
	NL3V8T244DTR2G onsemi	1	Wide VCCA and VCCB Operating Range: 0.9 V to 3.6 V• Balanced Output Drive: ±24 mA @ 3.0 V• High−Speed w/ Balanced Propagation Delay:2.8 ns max at 3.0 to 3.6 V• Inputs Pins OVT to 3.6 V• Non−preferential VCC Sequencing• Outputs at 3−State until Active VCC is Reached• Partial Power−Off Protection• Outputs Switch to 3−State with either VCC at GND• Typical Max Data Rates:380 Mbps (≥1.8−V to 3.3−V Translation)200 Mbps (≥1.1−V to [1.8−V, 2.5−V, 3.3−V] Translation)150 Mbps (≥1.1−V to 1.5−V	Small Outline Packages	NL3V8T244DTR2G	3D model available Symbol and footprint available 3	1 Download Model
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